Laminated ceramic electronic component

ABSTRACT

A laminated ceramic capacitor with a laminated body including a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The laminated body has a pair of mutually opposed principal surfaces extending in the direction in which the ceramic layers extend, a pair of mutually opposed side surfaces and a pair of mutually opposed end surfaces which respectively extend in directions orthogonal to the principal surfaces. The internal electrodes are 0.4 μm or less in thickness, and are located in an area defined by a width-direction gap of 30 μm or less interposed with respect to each of the pair of side surfaces and an outer layer thickness of 35 μm or less interposed with respect to each of the pair of principal surfaces.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of International applicationNo. PCT/JP2011/077887, filed Dec. 2, 2011, which claims priority toJapanese Patent Application No. 2010-271097, filed Dec. 6, 2010, theentire contents of each of which are incorporated herein by reference.

FIELD OF THE INVENTION

This invention relates to a laminated ceramic electronic component, andmore particularly, relates to an improvement for enhancing the thermalshock resistance of a laminated ceramic electronic component.

BACKGROUND OF THE INVENTION

For example, JP 2005-136132 A (Patent Document 1) discloses a techniquefor promoting the resistance of a laminated ceramic capacitor to thermalstress.

More specifically, Patent Document 1 discloses a laminated ceramiccapacitor including, as a main body section, a laminated body formed byarranging dielectric layers each between a plurality of internalelectrodes to be stacked in the stacking direction, and placing adielectric around the plurality of internal electrodes, characterized inthat a pair of upper and lower margin sections (outer layer sections)without any internal electrodes present is each placed between endsurfaces (principal surfaces) located in the stacking direction of thelaminated body and the internal electrodes closest to the end surfaces(principal surfaces) located in the stacking direction, a pair of rightand left margin sections (width-direction gap sections) without anyinternal electrodes present is each placed between end surfaces (sidesurfaces) located in a crossing direction with respect to the stackingdirection of the laminated body and the ends of the internal electrodes,the upper and lower margin sections (outer layer sections) and the rightand left margin sections (width-direction gap sections) each have adimension of 50 to 200 μm, and the difference in dimension between theupper and lower margin sections (outer layer sections) and the right andleft margin sections (width-direction gap sections) falls within 20% ofthe dimension of the upper and lower margin sections.

Patent Document 1 reports that a laminated ceramic capacitor which hashigh resistance to thermal stress is supposed to be achieved even when alarge number of internal electrodes are stacked. While thermal shocksare applied to laminated ceramic capacitors in, for example, solderreflow mounting, a thermal stress test at 280° C. is carried out in anexample described in Patent Document 1, and thus, the ability to bearthis thermal stress test means the ability to withstand thermal shocksin solder reflow mounting.

However, there has been a growing demand for a higher level of thermalshock resistance in recent years. For example, in cases such as alaminated ceramic capacitor used near an automobile engine room, or asubstrate with a laminated ceramic capacitor mounted thereon, which isfurther joined with some sort of substrate by welding or the like, thereis a demand for a higher level of thermal shock resistance. Thetechnique disclosed in Patent Document 1 may fail to deal with some ofsuch cases, and as a result of thermal shock, laminated ceramiccapacitors may suffer structural defects such as cracks.

While laminated ceramic capacitors have been described above, laminatedceramic electronic components other than laminated ceramic capacitorscan encounter the same problem.

Patent Document 1: JP 2005-136132 A

SUMMARY OF THE INVENTION

Therefore, an object of this invention is to provide a laminated ceramicelectronic component which can achieve a higher level of thermal shockresistance.

This invention is directed to a laminated ceramic electronic componentcomprising a laminated body including a plurality of stacked ceramiclayers and a plurality of internal electrodes located between theceramic layers, the laminated body having a pair of mutually opposedprincipal surfaces extending in a direction in which the ceramic layersextend, as well as a pair of mutually opposed side surfaces and a pairof mutually opposed end surfaces, the side surfaces and the end surfacesrespectively extending in directions orthogonal to the principalsurfaces, the internal electrodes extracted to either one of the pair ofend surfaces, and distributed in an area located with a width-directiongap interposed with respect to each of the pair of side surfaces andlocated with an outer layer thickness interposed with respect to each ofthe pair of principal surfaces.

In the laminated ceramic electronic component, a first aspect of thisinvention is characterized by meeting a first condition that theinternal electrode is 0.4 μm or less in thickness and a second conditionthat the width-direction gap is 30 μm or less or the outer layerthickness is 35 μm or less, in order to solve the technical problemmentioned previously.

For a second aspect of this invention, conditions are required which areseverer than in the case of the first aspect. More specifically, thefirst condition that the internal electrode is 0.4 μm or less inthickness is the same as in the case of the first aspect, while thesecond condition is both the width-direction gap of 30 μm or less andthe outer layer thickness of 35 μm or less.

This invention is, in a third aspect thereof, adapted to further meet athird condition that a coverage for the internal electrodes is 75% ormore, in addition to the first and second conditions in the first orsecond aspect.

This invention makes it possible to withstand a thermal shock of a highload such as, for example, 500° C., as will become clear fromexperimental examples below. Therefore, the laminated ceramic electroniccomponent according to this invention can adequately withstand, forexample, cases such as the laminated ceramic electronic component usednear an automobile engine room, or a substrate with the laminatedceramic electronic component thereon, which is further joined with somesort of substrate by welding or the like.

The laminated ceramic electronic component can be adapted to withstand athermal shock of a higher load in the case of meeting the conditionsaccording to the second aspect, as compared with the case of meeting theconditions according to the first aspect, and furthermore, can beadapted to withstand a thermal shock of a higher load in the case ofmeeting the conditions according to the third aspect, as compared withthe case of meeting the conditions according to the second aspect.

In general, when a thermal shock is applied to a laminated ceramicelectronic component, the difference in coefficient of thermal expansionbetween the ceramic section and the metal section of internal electrodescan generate stress to cause structural defects such as cracks. Then,when the structural defects are extended from specific starting pointsto reach the inner layer section with internal electrodes presenttherein, the defects will cause short circuit defects or deteriorationin moisture resistance.

The previously disclosed technique disclosed in Patent Document 1 hasthe idea that, briefly speaking, the upper and lower margin sections(outer layer sections) and the right and left margin sections(width-direction gap sections) are further increased in dimension to 50μm or more, to keep cracks caused by thermal stress, if any, fromreaching a capacitance forming section.

In contrast, in this invention, the internal electrodes are reduced inthickness to 0.4 μm or less to suppress the generation of stress due tothe difference in coefficient of thermal expansion, while thewidth-direction gap and/or the outer layer thickness are reduced incontrast to the case of Patent Document 1 to suppress the generation ofstructural defects such as cracks due to thermal shocks. Morespecifically, the concept is that stress itself caused by thermal stressis reduced to suppress the generation of cracks as much as possible.

BRIEF EXPLANATION OF THE DRAWINGS

FIG. 1 is a cross-sectional view illustrating a laminated ceramiccapacitor as an example of a laminated ceramic electronic componentaccording to an embodiment of this invention.

FIG. 2 is an enlarged cross-sectional view along the line II-II of FIG.1.

FIG. 3 is a diagram showing distributions of a width-direction gap andan outer layer thickness for samples with an internal electrode of 0.4μm in thickness among samples prepared in Experimental Example 1, andtogether showing evaluation results of defect generation for each samplewith symbols of • and ∘.

FIG. 4 is a diagram showing distributions of a width-direction gap andan outer layer thickness for samples with an internal electrode of 0.2μm in thickness among samples prepared in Experimental Example 1, andtogether showing evaluation results of defect generation for each samplewith symbols of • and ∘.

DETAILED DESCRIPTION OF THE INVENTION

The structure of a laminated ceramic capacitor 1 as an example of alaminated ceramic electronic component obtained by applying thisinvention will be described with reference to FIGS. 1 and 2.

The laminated ceramic capacitor 1 includes a laminated body 2 as acomponent main body. The laminated body 2 includes a plurality ofstacked ceramic layers 3 and a plurality of internal electrodes 4 and 5located between the ceramic layers 3. The internal electrodes 4 and theinternal electrodes 5 are arranged alternately in the stackingdirection.

The laminated body 2 forms a cuboidal shape or a substantially cuboidalshape which has a pair of mutually opposed principal surfaces 6 and 7extending in the direction in which the ceramic layers 3 extend, as wellas a pair of mutually opposed side surfaces 8 and 9 and a pair ofmutually opposed end surfaces 10 and 11 which respectively extend indirections orthogonal to the principal surfaces 6 and 7.

The end surfaces 10 and 11 of the laminated body 2 respectively have theplurality of internal electrodes 4 and 5 extracted thereto, and therespective ends exposed thereto, and external electrodes 12 and 13 areformed respectively so as to electrically connect the respective ends ofthe internal electrodes 4 to each other and the respective ends of theinternal electrodes 5 to each other.

The internal electrodes 4 and 5 are, as shown in FIG. 2, distributed inan area located with a predetermined width-direction gap A interposedwith respect to each of the pair of side surfaces 8 and 9, and locatedwith a predetermined outer-layer thickness B interposed with respect toeach of the pair of principal surfaces 6 and 7.

This laminated ceramic capacitor 1 according to this invention meets thefirst condition that the internal electrodes 4 and 5 each have athickness C of 0.4 μm or less, and the second condition that thewidth-direction gap A is 30 μm or less or the outer-layer thickness B is35 μm or less.

More preferably, as for the second condition, the capacitor is adaptedto meet both the width-direction gap A of 30 μm or less and theouter-layer thickness B of 35 μm or less. In this preferred embodiment,more preferably, the capacitor is adapted to meet the third conditionthat the coverage for the internal electrodes 4 and 5 is 75% or more.

It is to be noted that because of actual manufacturing problems, it isexpected that the thickness C for each of the internal electrodes 4 and5 has a lower limit on the order of 0.05 μm, the outer-layer thickness Bhas a lower limit on the order of 5 μm, and the width-direction gap Ahas a lower limit on the order of 5 μm.

For manufacturing this laminated ceramic capacitor 1, ceramic greensheets to serve as the ceramic layers 3 are first prepared, andconductive paste films to serve as the internal electrodes 4 and 5 areformed by printing onto the ceramic green sheets. Next, the multipleceramic green sheets are stacked to prepare an unfired laminated body toserve as the laminated body 2, which includes a plurality of unfiredceramic layers and the conductive paste films located between theunfired ceramic layers.

Then, a firing step is carried out for making the unfired laminated bodysintered. Then, the external electrodes 12 and 13 are respectivelyformed on the end surfaces 10 and 11 of the sintered laminated body 2,thereby completing the laminated ceramic capacitor 1.

When the thickness C for the internal electrodes 4 and 5 is reduced to0.4 μm or less in order to meet the first condition mentioned above, itis not easy to meet the third condition that the coverage is kept at 75%or more. For example, when the firing temperature is lowered, it is easyto keep the coverage at 75% or more, whereas the ceramic is somewhatinsufficiently sintered.

In order to solve this problem, it is effective to carry out, in thefiring step, a heat treatment step in which a temperature profile isapplied at an average rate of temperature increase of 40° C./second ormore, preferably 100° C./second or more up to a maximum temperature, andfurther desirably to carry out cooling without keeping the maximumtemperature after reaching the temperature in order to reduce the heatquantity. When the firing step is carried out under this condition, thecoverage for the internal electrodes 4 and 5 can be kept high whilemaking the ceramic sufficiently sintered.

In addition, the unfired laminated body is preferably subjected to adegreasing treatment before the heat treatment step described above inthe firing step.

When the internal electrodes 4 and 5 contain a base metal such as Ni asa conductive constituent, the heat treatment step may be carried out inan atmosphere supplied with an atmosphere gas which is oxidative withrespect to the equilibrium oxygen partial pressure of the base metal.

When this invention is directed to the laminated ceramic capacitor 1shown in FIG. 1 as described above, the ceramic layers 3 are composed ofdielectric ceramic. However, this invention may be applied to not onlylaminated ceramic capacitors, but also inductors, thermistors,piezoelectric components, etc. Therefore, depending on the function ofthe laminated ceramic electronic component, the ceramic layers may becomposed of, in addition to dielectric ceramic, magnetic ceramic,semiconductor ceramic, piezoelectric ceramic, etc.

In addition, while the laminated ceramic capacitor 1 shown in FIG. 1 isa two-terminal capacitor including two external terminals 12 and 13,this invention can be also applied to multi-terminal laminated ceramicelectronic components.

Experimental examples will be described below which were carried out forconfirming the advantageous effects of this invention.

EXPERIMENTAL EXAMPLE 1

(1) Preparation of Samples

Ceramic green sheets including: ceramic powder containing bariumtitanate as its main constituent; and an organic binder were formed onbase films so as to be 1 μm in thickness after firing. Then, conductivepaste films to serve as internal electrodes were formed by screenprinting onto the ceramic green sheets, so as to achieve the thicknessshown in the column “Thickness of Internal Electrode” in Tables 1 and 2after the firing. In this case, the dimensions of the printing patternfor the conductive paste films were adjusted so that internal electrodeswere distributed in a region located with a width-direction gapinterposed as shown in the column “Width-Direction Gap” in Tables 1 and2, in laminated bodies obtained through subsequent cutting step andfiring step.

Next, the green sheets with the conductive paste films formed thereonwere stacked a predetermined number of times so as to alternate thesides to which the conductive paste films were extracted, and further soas to sandwich these sheets, green sheets for an outer layer sectionwithout any conductive paste films formed were stacked a predeterminednumber of times, and heated and pressed to prepare laminated bodyblocks. In this case, the number of stacked green sheets for an outerlayer section was adjusted so as to achieve the “Outer Layer Thickness”in Tables 1 and 2 after the firing.

Next, the laminated body blocks were cut with a dicing saw to obtainunfired laminated bodies.

Next, the unfired laminated bodies obtained were subjected, fordegreasing, to a heat treatment with a maximum temperature of 240° C. inN₂ stream. Continuously, the laminated bodies were subjected to firingwith a maximum temperature of 1180° C. under an atmosphere with anoxygen partial pressure of 10^(−9.5) MPa in N₂—H₂O—H₂ stream.

For the sintered laminated bodies obtained in this way, externalelectrodes were formed on the end surface sections with the internalelectrodes extracted thereto. More specifically, a conductive pastecontaining copper as its main constituent was applied, and subjected tobaking at 800° C. to form base layers, and Ni plating films and Snplating films were formed thereon by wet plating.

Laminated ceramic capacitors according to each sample were obtained inthe way described above. The obtained laminated ceramic capacitorsincluding the external electrodes achieved the external dimensions asshown in the “Length-Direction Dimension”, “Width-Direction Dimension”,and “Thickness-Direction Dimension” of Tables 1 and 2.

Next, it was confirmed in the following way that the laminated ceramiccapacitors obtained achieved the values in the “Thickness of InternalElectrode”, “Outer Layer Thickness”, and “Width-Direction Gap” as shownin Tables 1 and 2.

(2) Thickness of Internal Electrode

Three laminated ceramic capacitors were prepared for each sample. Theselaminated ceramic capacitors were encased in a resin so as to barelypresent the end surfaces, and the end surfaces were polished in thelength directions of the laminated ceramic capacitors to obtain polishedcross sections at ½ in the length directions. Next, these polished crosssections were subjected to ion milling to remove drops produced by thepolishing. In this way, cross sections for observation were obtained.

Next, the group of internal electrodes was divided into three equalparts with respect to the thickness direction of the sample, which wereclassified in three regions of: an upper area; a middle area; and alower area. In addition, in the cross section, a perpendicular line wasdrawn which was orthogonal to the internal electrodes and divided theinternal electrodes into two equal parts in the width direction. Then,twenty-five layers of internal electrodes were selected from each of thecentral parts of the three regions, and the thicknesses of theseinternal electrodes were measured on the perpendicular line.

Thus, the thickness of the internal electrode was measured at 75 pointsfor one sample, and the thickness of the internal electrode was obtainedat 225 points in total for the three samples in total to figure out theaverage value of these thicknesses. However, the points with thedefective internal electrodes were not counted.

As a result, it was confirmed that the average value for the thicknessof the internal electrode for each sample was nearly the targeted valueas shown in the column “Thickness of Internal Electrode” of Tables 1 and2.

(3) Width Direction Gap

The cross sections for observation, obtained in the section (2), wereused for figuring out the width direction gap. Seven layers of internalelectrodes were specified which were located to divide the area with theinternal electrodes present therein into six equal parts with respect tothe thickness direction of the sample. In the locations of the fivelayers of internal electrodes after excluding the uppermost layer ofinternal electrode and the lowermost layer of internal electrode amongthese seven layers of internal electrodes, the width direction gap wasmeasured at 10 points in total on both the right-hand side and left-handside. Then, the value of the width-direction gap was obtained at 30points in total for the three samples in total to figure out the averagevalue of these values.

As a result, it was confirmed that the average value for thewidth-direction gap for each sample was nearly the targeted value asshown in the column “Width Direction Gap” of Tables 1 and 2.

(4) Outer Layer Thickness

First of all, the cross sections for observation, obtained in thesection (2), were used for figuring out the outer layer thickness. Sevenperpendicular lines were drawn which were orthogonal to the internalelectrodes and divided the internal electrodes into six equal parts inthe width direction. On the five perpendicular lines after excluding thetwo outermost perpendicular lines among these seven perpendicular lines,the outer layer thickness was measured at 10 points in total on both theupper side and lower side. Then, the outer layer thickness was firstobtained at 30 points in total for the three samples in total.

Secondly, three laminated ceramic capacitors were further prepared foreach sample. These laminated ceramic capacitors were encased in a resinso as to barely present the side surfaces, and the side surfaces werepolished in the width directions of the laminated ceramic capacitors toobtain polished cross sections at ½ in the width directions. Next, thesepolished cross sections were subjected to ion milling to remove dropsproduced by the polishing. In this way, second cross sections forobservation were obtained.

In this second cross section, perpendicular lines were drawn which wereorthogonal to the internal electrodes and divide the overlap region ofthe internal electrodes (the region except for the length-directiongaps) into six equal parts in the length direction. On the fiveperpendicular lines after excluding the two outermost perpendicularlines among these seven perpendicular lines, the outer layer thicknesswas measured at 10 points in total on both the upper side and lowerside. Then, the outer layer thickness was further obtained at 30 pointsin total for the three samples in total.

Thus, the average value was figured out for the outer layer thicknessesat 60 points in total for the six samples in total. As a result, it wasconfirmed that the outer layer thickness for each sample had nearly thetargeted value as shown in the column “Outer Layer Thickness” of Tables1 and 2.

It is to be noted that the coverage for the internal electrodes wasabout 80% for all of samples 1 to 74 shown in Tables 1 and 2. As for thecoverage, the laminated body was subjected to peeling, and then, thesurface near the center of the internal electrode pattern at the peeledsurface was observed under an optical microscope to figure out the ratioof the area with the internal electrode present therein, and regard thisratio as the coverage.

(5) Evaluation

The laminated ceramic capacitors according to each sample were subjectedto a thermal shock test as follows.

The thermal shock test was carried out in which the laminated ceramiccapacitors according to each sample were immersed for 2 seconds in asolder bath at a temperature of 500° C., and the presence or absence ofstructural defect generation was evaluated by optical microscopicobservation. This evaluation was performed for hundred samples to figureout the ratio of the number of samples with structural defectsgenerated. The results are shown in the column “Defect Generation Ratio”of Tables 1 and 2.

TABLE 1 Thickness Length Width Thickness of Thickness DirectionDirection Direction Internal of Outer Width Defect Sample DimensionDimension Dimension Electrode Layer Direction Generation Number [mm][mm] [mm] [μm] [μm] Gap [μm] Ratio [%] 1 3.2 1.6 1.6 1.0 30 30 100 2 3.21.6 1.6 1.0 60 30 100 3 3.2 1.6 1.6 1.0 120 30 100 4 3.2 1.6 1.6 1.0 3060 100 5 3.2 1.6 1.6 1.0 60 60 100 6 3.2 1.6 1.6 1.0 120 60 100 7 3.21.6 1.6 1.0 30 120 100 8 3.2 1.6 1.6 1.0 60 120 100 9 3.2 1.6 1.6 1.0120 120 100 10 2.0 1.2 1.2 1.0 35 25 100 11 2.0 1.2 1.2 1.0 70 25 100 122.0 1.2 1.2 1.0 140 25 100 13 2.0 1.2 1.2 1.0 35 50 100 14 2.0 1.2 1.21.0 70 50 100 15 2.0 1.2 1.2 1.0 140 50 100 16 2.0 1.2 1.2 1.0 35 100100 17 2.0 1.2 1.2 1.0 70 100 100 18 2.0 1.2 1.2 1.0 140 100 100 19 3.21.6 1.6 0.6 30 30 100 20 3.2 1.6 1.6 0.6 60 30 100 21 3.2 1.6 1.6 0.6120 30 100 22 3.2 1.6 1.6 0.6 30 60 100 23 3.2 1.6 1.6 0.6 60 60 100 243.2 1.6 1.6 0.6 120 60 100 25 3.2 1.6 1.6 0.6 30 120 100 26 3.2 1.6 1.60.6 60 120 100 27 3.2 1.6 1.6 0.6 120 120 100 28 2.0 1.2 1.2 0.6 35 25100 29 2.0 1.2 1.2 0.6 70 25 100 30 2.0 1.2 1.2 0.6 140 25 100 31 2.01.2 1.2 0.6 35 50 100 32 2.0 1.2 1.2 0.6 70 50 100 33 2.0 1.2 1.2 0.6140 50 100 34 2.0 1.2 1.2 0.6 35 100 100 35 2.0 1.2 1.2 0.6 70 100 10036 2.0 1.2 1.2 0.6 140 100 100

TABLE 2 Thickness Length Width Thickness of Thickness DirectionDirection Direction Internal of Outer Width Defect Sample DimensionDimension Dimension Electrode Layer Direction Generation Number [mm][mm] [mm] [μm] [μm] Gap [μm] Ratio [%] 37 3.2 1.6 1.6 0.4 30 30 0 38 3.21.6 1.6 0.4 60 30 0 39 3.2 1.6 1.6 0.4 120 30 0 40 3.2 1.6 1.6 0.4 30 600 41 3.2 1.6 1.6 0.4 60 60 100 42 3.2 1.6 1.6 0.4 120 60 100 43 3.2 1.61.6 0.4 30 120 0 44 3.2 1.6 1.6 0.4 60 120 100 45 3.2 1.6 1.6 0.4 120120 100 46 2.0 1.2 1.2 0.4 35 25 0 47 2.0 1.2 1.2 0.4 70 25 0 48 2.0 1.21.2 0.4 140 25 0 49 2.0 1.2 1.2 0.4 35 50 0 50 2.0 1.2 1.2 0.4 70 50 10051 2.0 1.2 1.2 0.4 140 50 100 52 2.0 1.2 1.2 0.4 35 100 0 53 2.0 1.2 1.20.4 70 100 100 54 2.0 1.2 1.2 0.4 140 100 100 55 3.2 1.6 1.6 0.4 50 50100 56 3.2 1.6 1.6 0.2 30 30 0 57 3.2 1.6 1.6 0.2 60 30 0 58 3.2 1.6 1.60.2 120 30 0 59 3.2 1.6 1.6 0.2 30 60 0 60 3.2 1.6 1.6 0.2 60 60 41 613.2 1.6 1.6 0.2 120 60 73 62 3.2 1.6 1.6 0.2 30 120 0 63 3.2 1.6 1.6 0.260 120 80 64 3.2 1.6 1.6 0.2 120 120 97 65 2.0 1.2 1.2 0.2 35 25 0 662.0 1.2 1.2 0.2 70 25 0 67 2.0 1.2 1.2 0.2 140 25 0 68 2.0 1.2 1.2 0.235 50 0 69 2.0 1.2 1.2 0.2 70 50 40 70 2.0 1.2 1.2 0.2 140 50 92 71 2.01.2 1.2 0.2 35 100 0 72 2.0 1.2 1.2 0.2 70 100 68 73 2.0 1.2 1.2 0.2 140100 100 74 3.2 1.6 1.6 0.2 50 50 24

FIGS. 3 and 4 show distributions of the width-direction gap and outerlayer thickness for specific samples, and together show the evaluationresults of defect generation with symbols of • and ∘. FIG. 3 hereinshows samples 37 to 55 of 0.4 μm in the thickness of the internalelectrode as shown in Table 2. FIG. 4 shows samples 56 to 65 of 0.2 μmin the thickness of the internal electrode as shown in Table 2.

In FIGS. 3 and 4, the defect generation ratio higher than 0%(particularly in FIG. 3, the defect generation ratio of 100%) isexpressed by the symbol •, whereas the defect generation ratio of 0% isexpressed by the symbol ∘. When a comparison is made between FIGS. 3 and4, it is determined that the case of 0.4 μm in the thickness of theinternal electrode also has the same tendency as in the case of 0.2 μmin the thickness of the internal electrode.

From Table 1 as well as FIGS. 3 and 4, it is determined that the defectgeneration ratio of 0% can be achieved as long as the condition of 0.4μm or less in the thickness of the internal electrode is met, and thecondition of 35 μm or less in outer layer thickness or 30 μm or less inwidth direction gap is met.

EXPERIMENTAL EXAMPLE 2

In Experimental Example 2, the relationship was evaluated between thecoverage for internal electrodes and the defect generation ratio in athermal shock test.

Through essentially the same steps as in the case of ExperimentalExample 1, laminated ceramic capacitors according to each sample wereobtained which had the external dimensions shown in “Length DirectionDimension”, “Width Direction Dimension” and “Thickness DirectionDimension” of Table 3. The laminated ceramic capacitors according toeach sample were all adjusted to 0.4 μm in the thickness of the internalelectrode, 30 μm in width direction gap, and 35 μm in outer layerthickness. Then, the coverage for the internal electrodes was varied asshown in the column “Coverage” of Table 3, by controlling the maximumtemperature in the firing step between 1100° C. and 1300° C.

For each of the obtained samples, the “Thickness of Internal Electrode”,“Width Direction Gap”, and “Outer Layer Thickness” were measured in thesame way as in Experimental Example 1 to confirm that nearly thetargeted values were achieved as described above.

In addition, the coverage for the internal electrodes was also nearlythe targeted value.

For each of the obtained samples, a thermal shock test was carried outin the same manner as in the case of Experimental Example 1, except thatthe temperature of the solder bath was set as shown in the column“Solder Bath Temperature” of Table 3, and the ratio of the number ofsamples with structural defects generated was figured out. The resultsare shown in the column “Defect Generation Ratio” of Table 3.

TABLE 3 Length Width Thickness Direction Direction Direction Solder BathDefect Sample Dimension Dimension Dimension Coverage TemperatureGeneration Number [mm] [mm] [mm] [%] [° C.] Ratio [%] 101 3.2 1.6 1.6 48400 26 102 3.2 1.6 1.6 62 400 13 103 3.2 1.6 1.6 75 400 0 104 3.2 1.61.6 97 400 0 105 3.2 1.6 1.6 46 450 57 106 3.2 1.6 1.6 65 450 27 107 3.21.6 1.6 76 450 0 108 3.2 1.6 1.6 92 450 0 109 3.2 1.6 1.6 44 500 88 1103.2 1.6 1.6 58 500 52 111 3.2 1.6 1.6 79 500 0 112 3.2 1.6 1.6 95 500 0

From Table 3, it can be confirmed that meeting the condition that thecoverage for the internal electrodes is 75% or more is more effectivefor the reduction in defect generation ratio.

More specifically, in FIG. 3, when attention is paid to the “Coverage”for the samples with the “Defect Generation Ratio” of 0%, the “DefectGeneration Ratio” is 0% with the “Coverage” of 75% or more in the caseof the “Solder Bath Temperature” of 400° C. From the foregoing, it isfirst determined that the “Coverage” is preferably 75% or more at leastagainst the thermal shock of 400° C.

The “Coverage” is preferably higher against thermal shocks of highertemperatures, and more specifically, the “Defect Generation Ratio” is 0%with the “Coverage” of 76% or more in the case of the “Solder BathTemperature” of 450° C., whereas the “Defect Generation Ratio” is 0%with the “Coverage” of 79% or more in the case of the “Solder BathTemperature” of 500° C.

DESCRIPTION OF REFERENCE SYMBOLS

1 laminated ceramic capacitor

2 laminated body

3 ceramic layer

4,5 internal electrode

6,7 principal surface

8,9 side surface

10,11 end surface

1. A laminated ceramic electronic component comprising: a laminated bodyincluding a plurality of stacked ceramic layers and a plurality ofinternal electrodes located between the ceramic layers, the laminatedbody having a pair of mutually opposed principal surfaces extending in adirection in which the ceramic layers extend, a pair of mutually opposedside surfaces and a pair of mutually opposed end surfaces, the sidesurfaces and the end surfaces respectively extending in directionsorthogonal to the principal surfaces, the plurality of internalelectrodes including a first set of internal electrodes that extend to afirst end surface of the pair of end surfaces and a second set ofinternal electrodes that extend to a second end surface of the pair ofend surfaces, the plurality of internal electrodes being distributed inan area defined by a width-direction gap interposed with respect to eachof the pair of side surfaces and an outer layer thickness interposedwith respect to each of the pair of principal surfaces, wherein theplurality of internal electrodes are 0.4 μm or less in thickness, and atleast one of (1) the width-direction gap is 30 μm or less and (2) theouter layer thickness is 35 μm or less.
 2. The laminated ceramicelectronic component according to claim 1, wherein both thewidth-direction gap is 30 μm or less and the outer layer thickness is 35μm or less.
 3. The laminated ceramic electronic component according toclaim 2, wherein a coverage of the plurality of internal electrodes is75% or more.
 4. The laminated ceramic electronic component according toclaim 1, wherein a coverage of the plurality of internal electrodes is75% or more.
 5. The laminated ceramic electronic component according toclaim 1, wherein the plurality of internal electrodes are no less than0.05 μm in thickness.
 6. The laminated ceramic electronic componentaccording to claim 5, wherein the width-direction gap is no less than 5μm.
 7. The laminated ceramic electronic component according to claim 6,wherein the outer layer thickness is no less than 5 μm.
 8. The laminatedceramic electronic component according to claim 1, wherein thewidth-direction gap is no less than 5 μm.
 9. The laminated ceramicelectronic component according to claim 1, wherein the outer layerthickness is no less than 5 μm.
 10. The laminated ceramic electroniccomponent according to claim 2, wherein the plurality of internalelectrodes are no less than 0.05 μm in thickness.
 11. The laminatedceramic electronic component according to claim 10, wherein thewidth-direction gap is no less than 5 μm.
 12. The laminated ceramicelectronic component according to claim 11, wherein the outer layerthickness is no less than 5 μm.
 13. The laminated ceramic electroniccomponent according to claim 2, wherein the width-direction gap is noless than 5 μm.
 14. The laminated ceramic electronic component accordingto claim 2, wherein the outer layer thickness is no less than 5 μm.